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This case study concerns the Tree Identify Protocol of the IEEE 1394 High Performance Serial Bus (called ``FireWire''). |
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These are probabilistic timed automaton (PTA) models. You can also find, in the directory ../../firewire, |
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manually-created MDP models for this case study, built using the "digital clocks" semantics [KNPS06]. |
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We consider the following probabilistic timed automata models of the root contention part of the |
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tree identify protocol, which are based on probabilistic I/O automata models presented in [SV99]. |
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impl: which consists of the parallel composition of two nodes (Node1 and Node2), |
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and two communication channels (Wire12 for messages from Node1 to Node2, |
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and Wire21 for messages from Node2 to Node1) and corresponds to the |
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system Impl of [SV99]. |
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abst: which is represented by a single probabilistic timed automaton and is an abstraction of Impl |
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based on the the probabilistic I/O automaton I1 of [SV99]. |
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For more information, see: http://www.prismmodelchecker.org/casestudies/firewire.php |
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===================================================================================== |
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[SV99] |
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M. Stoelinga and F. Vaandrager |
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Root Contention in IEEE 1394 |
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In Proc. 5th AMAST Workshop on Real-Time and Probabilistic Systems (ARTS'99), pp. 53-74, 1999 |
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(Available as Volume 1601 of LNCS, (c) Springer Verlag) |
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[KNPS06] |
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M. Kwiatkowska, G. Norman, D. Parker and J. Sproston |
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Performance Analysis of Probabilistic Timed Automata using Digital Clocks |
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Formal Methods in System Design, 29:33-78, 2006 |